Microprocessor architecture : from simple pipelines to chip multiprocessors / Jean-Loup Baer.

Author: Baer, Jean-Loup.

Imprint:New York : Cambridge University Press, 2010.

Descriptionxiv, 367 p. : ill. ; 26 cm.

Note:Introduction -- The basics -- Superscalar processors -- Front-end : branch predictio, instruction fetching, and register renaming -- Back-end : instruction scheduling, memory access instructions, and clusters -- The cache hierarchy -- Multiprocessors -- Multithreading and (chip) multiprocessing -- Current limitations and future challenges.

Bibliography Note:Includes bibliographical references (p. 351-360) and index.

This item has been checked out 2 time(s)
and currently has 0 hold request(s).